With the development of integrated circuits towards very-large-scale integration (VLSI), the circuit density in an integrated circuit becomes higher, the quantity of semiconductor components included in the integrated circuit is increased, and the sizes of semiconductor components are also reduced. As the sizes of semiconductor structures become smaller, channel lengths of devices in semiconductor structures are also reduced. Because of the reduction of channel lengths, gradual channel approximation (GCA) is no longer valid and various adverse physical effects become more prominent. Therefore, the performance and the reliability of the devices may be degraded, and further reducing the sizes of the devices may be difficult.
With the progress in device manufacturing technology, the sizes of devices are reduced, and the working voltages of semiconductor devices also become lower and lower. In a traditional device with a metal-oxide-semiconductor (MOS) structure, the subthreshold swing may not be lower than 60 mV/dec. Such a minimum value of the subthreshold swing may limit the lowest working voltage of traditional complementary metal-oxide-semiconductor (CMOS) devices.
Currently, in order to further reduce the lowest working voltage of CMOS devices, various new types of devices have been provided to break the limitation on the subthreshold swing. For example, one type of such devices is tunneling field-effect-transistor (TFET). TFET is a transistor based on quantum tunneling effect and using a tunneling current as the major component of the current in the transistor structure. In a certain voltage range, the subthreshold swing of TFET may be reduced to 15 mV/dec. Therefore, TFET may demonstrate advanced characteristics such as low power, high working efficiency, etc.
However, the fabrication process for the source regions and the drain regions in existing FETs may be greatly limited, and thus may affect the improvement of the performance of the FETs. The disclosed FETs and the fabrication methods are directed to solve one or more problems set forth above and other problems in the art.